A) Field of the Invention
The present invention relates to a solid state image pickup device, and more particularly to a solid state image pickup device having an optical black region.
B) Description of the Related Art
With reference to FIGS. 3A to 3E, description will be made on the structure of a CCD type solid state image pickup device. FIGS. 3A and 3B are schematic plan views showing the structure of CCD type solid state image pickup devices, and FIG. 3C is a schematic plan view showing a partial area of a light reception region of a CCD solid state image pickup device having a pixel interleaved array. FIG. 3D is a schematic cross sectional view showing a partial region of a light reception region of a CCD solid state image pickup device, and FIG. 3E is a schematic cross sectional view showing a partial region of a horizontal transfer channel and a charge detection unit.
Reference is made to FIG. 3A. A CCD solid state image pickup device is constituted of: a plurality of photosensitive regions 62 disposed, for example, in a square matrix shape; a plurality of vertical transfer channels (vertical CCDs) 64 disposed along columns of the photosensitive regions 62; a channel stop region 76 disposed between adjacent vertical transfer channels 64; a horizontal transfer channel (horizontal CCDs) 66 electrically connected to the ends of the vertical transfer channels 64 outside a light reception region (pixel array region) 61; and a charge detection unit 67 coupled to one end of the horizontal transfer channel 66. The light reception region 61 is constituted of the photosensitive regions 62 and vertical transfer channels 64.
The photosensitive region 62 is constituted of a photosensitive element, e.g., a photodiode, and a transfer gate. The photodiode generates and accumulates signal charges corresponding to an incidence light amount. The accumulated signal charges are read to the vertical transfer channels 64 via transfer gates and transferred in the vertical transfer channels 64 along a direction (vertical direction, column direction) toward the horizontal transfer channel 66 as a whole. Signal charges transferred to the ends of the vertical transfer channels 64 are transferred into the horizontal transfer channel 66.
Signal charges transferred into the horizontal transfer channel 66 are transferred in the horizontal transfer channel 66 along a direction crossing the vertical direction as a whole, e.g., along a horizontal direction (direction perpendicular to the vertical direction, row direction), and thereafter transferred to the charge detection unit 67. In accordance with the signal charges transferred from the horizontal transfer channel 66, the charge detection unit 67 performs charges-voltage conversion and signal amplification. The amplified image signal is delivered to an external.
The array of photosensitive regions 62 includes a tetragonal array with the photosensitive regions being disposed in a square matrix along the row and column directions at constant pitches as shown in FIG. 3A, and in addition, a pixel interleaved array (PIA) having pixels disposed along the row and column directions by shifting the pixels, for example, a half pitch at every second rows and columns.
FIG. 3B is a schematic plan view of a CCD solid state image pickup device of the pixel interleaved array. The pixel interleaved array is an array of photosensitive regions disposed in a first square matrix shape and photosensitive regions disposed in a second square matrix shape at positions between lattice points of the first square matrix shape. The vertical transfer channel 64 is formed in a zigzag shape between photosensitive regions 62. Also in this case, signal charges are transferred in the vertical transfer channel 64 along a direction (vertical direction) toward the horizontal transfer channel 66 as a whole.
FIG. 3C is a schematic plan view showing some photosensitive regions of a CCD type solid state image pickup device of a pixel interleaved array. A vertical transfer channel 64 is formed along a column of photodiodes 60 disposed in a pixel interleaved array and in a zigzag shape between photodiodes 60. A channel stop region 76 is formed between adjacent columns of vertical transfer channels 64. The channel stop region 76 serves also as an isolation region between adjacent columns of photodiodes 60. Vertical transfer electrodes (a first layer vertical transfer electrode 75a and a second layer vertical transfer electrode 75b) are formed above the vertical transfer channels 64, covering the vertical transfer channels. Signal charges generated by photoelectric conversion of incidence light upon each photodiode 60 are read to the adjacent vertical transfer channel 64 when a read voltage is applied to the first layer vertical transfer electrode 75a. In FIG. 3C, the direction of reading signal charges is indicated by arrows. Signal charges read to the vertical transfer channel 64 are transferred in the vertical transfer channel 64 toward the horizontal transfer channel as a whole (along a downward direction in FIG. 3C).
FIG. 3D is a schematic cross sectional view showing a partial region of the light reception region of a CCD solid state image pickup device. For example, formed in a p-type well 82 (for example, constituted of a lower layer well p-type region 82a and an upper layer well p−-type region 82b) formed in an n-type silicon substrate 81 with a high resistivity epitaxial layer are a charge accumulation region 71 made of an n-type impurity doped region and a vertical transfer channel 64 made of an n-type impurity doped region and being adjacent to a plurality of charge accumulation regions 71 and via an adjacent p-type transfer gate 72. A vertical transfer electrode 75 is formed above the transfer gate 72 and vertical transfer channel 64, with an insulating film 74 being interposed therebetween. A p-type or p+-type channel stopper region 76 is formed between adjacent charge accumulation regions 71 and under the vertical transfer channel 64.
The channel stop region 76 electrically isolates the charge accumulation region 71, vertical transfer channel 64 and the like. The insulating film 74 is, for example, a lamination structure (ONO film) of an oxide film, a nitride film and an oxide film, formed on the surface of the silicon substrate 81. The vertical transfer electrode 75 includes a first vertical transfer electrode and a second vertical transfer electrode made of, for example, polysilicon. These electrodes may be made of amorphous silicon. The vertical transfer electrode 75 controls the potentials of the vertical transfer channel 64 and transfer gate 72 to read charges accumulated in the charge accumulation region 71 to the vertical transfer channel 64 and transfer the read charges in the vertical transfer channel 64 along the column direction.
An insulating silicon oxide film 77 is formed on the vertical transfer electrode 75, for example, by thermally oxidizing polysilicon.
A light shielding film 79 made of, for example, tungsten (W), is formed above the vertical transfer electrode 75 via the insulating silicon oxide film 77 and an insulating film of silicon oxide, silicon nitride or the like formed on the whole substrate surface by CVD or the like. An opening 79a is formed through the light shielding film 79 above the charge accumulation region 71. The light shielding film 79 prevents incidence light upon the light reception region 61 from entering the region other than the charge accumulation region 71. A silicon nitride film 78 is formed on the light shielding film 79. The silicon nitride film 78 is not necessarily required.
A planarizing layer 83a made of, for example, boro-phospho silicate glass (BPSG) is formed above the light shielding film 79. A color filter layer 84 of, e.g., three primary colors of red (R), green (G) and blue (B) is formed on the flat surface of the planarizing layer. In order to planarize the upper surface of the color filter layer, another planarizing layer 84B is formed. Micro lenses 85 are formed on a flat surface of the planarizing layer 84B, for example, by melting and solidifying a micro lens photoresist pattern. The micro lenses 85 are an array of, e.g., fine semispherical convex lenses disposed above the charge accumulation regions 71. Each micro lens 85 converges incidence light on the charge accumulation region 71. Light converged by each micro lens 85 passes through the color filter layer 84 of one of red (R), green (G) and blue (B) and becomes incident upon the corresponding charge accumulation region (photodiode) 71. A plurality of photodiodes include therefore three types of photodiodes: a photodiode upon which light transmitted through the red (R) color filter layer 84 becomes incident; a photodiode upon which light transmitted through the green (G) color filter layer 84 becomes incident; and a photodiode upon which light transmitted through the blue (B) color filter layer 84 becomes incident.
Signal charges accumulated in the charge accumulation region 71 and corresponding in amount to an incidence light amount are read to the vertical transfer channel 64 by a drive signal (read voltage) applied to the vertical transfer electrode 75 above the transfer gate 72, and transferred in the vertical transfer channel 64 by a drive signal (transfer voltage) applied to the vertical transfer electrode 75.
A positive voltage is applied to the semiconductor substrate 81 as a substrate drain voltage. Since the channel region 76 exists, a potential barrier between the charge accumulation region 71 and semiconductor substrate 81 is lower than a potential barrier between the vertical transfer channel 64 and semiconductor substrate 81. Therefore, for example, when excessive light enters the photodiode (charge accumulation region 71), charges (electrons) overflowing from the charge accumulation region 71 flow over the p-type barrier and into the n-type semiconductor substrate 81. This function is called a vertical type overflow drain (substrate drain shutter).
FIG. 3E is a schematic cross sectional view showing a portion of a horizontal transfer channel and a charge detection unit of a CCD type solid state image pickup device.
The n-type horizontal transfer channel 66 is formed, for example, in a p-type well 82 formed in a surface layer of an n-type semiconductor substrate 81. A first layer horizontal transfer electrode 87 and a second layer horizontal transfer electrode 88 are alternately formed along a longitudinal direction of the horizontal transfer channel 66 above the horizontal transfer channel 66, with an insulating film 74 being interposed therebetween.
A low impurity concentration region (n−type region) formed in a region under an area between adjacent first layer horizontal transfer electrodes 87 forms a reverse flow preventive potential barrier, and an n-type region between the n−type regions forms a potential well. One transfer stage is constituted of the potential well and the upstream side (right side) potential barrier. As described earlier, the charge detection unit 67 is formed at one end of the horizontal transfer channel 66.
The first layer horizontal transfer electrode 87 and second layer horizontal transfer electrode 88 are connected in common at each transfer stage. In response to a drive signal (transfer voltage) applied to the first layer horizontal transfer electrode 87 and second layer horizontal transfer electrode 88, signal charges are transferred in the horizontal transfer channel 66 along the horizontal direction toward the left. The first layer horizontal transfer electrode 87 and second layer horizontal transfer electrode 88 are made of polysilicon or amorphous silicon.
The horizontal transfer channel 66 at the last transfer stage is connected to a floating diffusion 90 of the charge detection unit 67 via a transfer unit to which an output gate voltage VOG is applied. Signal charges transferred in the horizontal transfer channel 66 are transferred to the charge detection unit 67 (floating diffusion 90).
The charge detection unit 67 includes: the n++-type floating diffusion 90; an n-type reset gate RS 91, an n++-type reset drain RD 93, a reset gate electrode 92 formed above the reset gate 91 with an insulating film 74 being interposed therebetween; and an amplifier 94 having a MOS transistor whose gate is electrically connected to the floating diffusion 90. The reset gate electrode 92 is made of polysilicon or amorphous silicon.
Signal charges are transferred from the horizontal transfer channel 66 to the floating diffusion 90. In the state when the floating diffusion 90 is electrically isolated, charges-voltage conversion is performed between the transferred charges and a capacitance of the floating diffusion 90. A converted voltage signal is amplified by the amplifier 94 and output as an image signal.
The signal charges transferred to the floating diffusion 90 are drained to the reset drain 93 via the reset gate 91 after the charges-voltage conversion and before signal charges of the next pixel are sent to the charge detection unit 67. A constant voltage φRG is applied to the reset gate electrode 92 for charge drain. With reference to FIGS. 4A to 4C, the light reception region (pixel array region) will be described more in detail.
FIG. 4A corresponds to FIGS. 3A and 3B and is a schematic plan view showing the structure of a CCD type solid state image pickup device. FIG. 4A does not show the photosensitive regions 62, vertical transfer channels (vertical CCDs) 64 and channel stop regions 76 shown in FIGS. 3A and 3B.
As shown in FIG. 4A, a light reception region (pixel array region) 61 is constituted of an effective pixel region 58 and an optical black region 59. The effective pixel region 58 is defined in a non-peripheral area (central area) of the light reception region (pixel array region) 61, for example, as a rectangular area. The optical black region 59 is defined in a peripheral area of the light reception region (pixel array region) 61, surrounding the effective pixel region 58.
FIG. 4B is a cross sectional view taken along line 4B-4B of FIG. 4A, assuming that FIG. 4A is a plan view of an inter-line transfer type solid state image pickup device such as shown in FIG. 3A. FIG. 4B is partially simplified more than the cross sectional view of FIG. 3D.
As described earlier, the light reception region (pixel array region) 61 includes the effective pixel region 58 and optical black region 59. In both regions, charge accumulation regions 71, vertical transfer channels 64 and channel stop regions 76 are formed in a well 82 formed in a semiconductor substrate 81, and vertical transfer electrodes 75, a silicon oxide film 77 and a light shielding film 79 are formed above the semiconductor substrate 81 formed with an insulating film 74.
In the effective pixel region 58, an opening 79a is formed through the light shielding film 79 above the charge accumulation region 71, whereas in the optical black region 59, no opening 79a is formed through the light shielding film 79 (the light shielding film 79 covers a region above the charge accumulation region 71).
FIG. 4C is a cross sectional view taken along line 4B-4B of FIG. 4A, assuming that FIG. 4A is a plan view of a pixel interleaved array type solid state image pickup device such as shown in FIG. 3B.
A different point of FIG. 4C from the cross sectional view shown in FIG. 4B resides in that the vertical transfer channel 64 under the vertical transfer electrode 75 is divided into two regions by the channel stop regions 76. Also in the pixel interleaved array type solid state image pickup device, the effective pixel region 58 differs from the optical black region 59 in that the opening 79a is formed through the light shielding film 79 above the charge accumulation region 71.
In the optical black region 59, incidence light is shielded by the light shielding film 79. Therefore, only dark noises are generally generated in the photodiodes or vertical transfer channels 64 in the optical black region 59, and these dark noises are a signal in the optical black region 59. A normal output signal in the effective pixel region 58 often adopts a value of a signal obtained in the effective pixel region 58 subtracted by a black reference signal (i.e., dark noises) which is a signal in the optical black region 59.
Signal charges will not enter usually the optical black region 59 from the effective pixel region 58. This is because there is the above-described vertical type overflow drain function.
However, when very strong light becomes incident upon the region of the effective pixel region 58 near the optical black region 59, in some cases, electrons generated in the well 82 through photoelectric conversion are not drained to the n-type semiconductor substrate 81 but diffuse and leak into the vertical channels 64 in the optical black region 59. Particularly, while a read pulse voltage is applied to the transfer gate to read signal charges from the charge accumulation region 71 to the vertical transfer channel 64, a potential under the electrode applied with the read voltage becomes lower than the potential at the vertical type overflow drain structure. It can therefore be considered that the vertical type overflow drain does not function sufficiently and leak of charges into the optical black region 59 occurs more likely (for example, refer to JP-A-2003-224255).
Leak of charges into the optical black region 59 results in a lower signal in the effective pixel region 58 and may corrupt a photographed image, because the black reference signal contains the leak components in addition to the dark noises when the normal output signal in the effective pixel area 58 is calculated.
Although pixels are made fine in recent years, a transmission depth of light into silicon will not change. It is not easy to control motion of carriers generated at a deep position. Therefore, the above-described disadvantages occur more likely as solid state image pickup devices are made more compact.